mon: better support for negative address

This commit is contained in:
minjaesong
2025-04-30 23:42:50 +09:00
parent 50b3993f44
commit 3b63aad986
2 changed files with 31 additions and 9 deletions

View File

@@ -38,6 +38,13 @@ let peek = (p) => {
} }
} }
let printAddr = (P) => {
if (P >= 0)
print(' $'+(uhex(P, 6))+' : ')
else
print('-$'+(uhex(-P, 6))+' : ')
}
while (1) { while (1) {
print(prompt[+!pE]) print(prompt[+!pE])
let buf = read().split(' ') let buf = read().split(' ')
@@ -50,13 +57,15 @@ while (1) {
let addr = parseInt(buf[1], 16) let addr = parseInt(buf[1], 16)
let addr2 = parseInt(buf[2], 16) let addr2 = parseInt(buf[2], 16)
if (Number.isNaN(addr)) { if (Number.isNaN(addr)) {
println((uhex(P, 6))+' : '+uhex(peek(P))) printAddr(P)
println(uhex(peek(P)))
pE = undefined pE = undefined
} }
else { else {
let oldP = P let oldP = P
P = addr P = addr
if (Number.isNaN(addr2)) { if (Number.isNaN(addr2)) {
printAddr(P)
println(uhex(peek(P))) println(uhex(peek(P)))
pE = undefined pE = undefined
} }
@@ -65,7 +74,7 @@ while (1) {
else { else {
for (let i = 0; i <= Math.abs(addr2) - Math.abs(addr); i++) { for (let i = 0; i <= Math.abs(addr2) - Math.abs(addr); i++) {
if (i % 16 == 0 && i > 0) { println() } if (i % 16 == 0 && i > 0) { println() }
if (i % 16 == 0) { print((uhex(P, 6))+' : ') } if (i % 16 == 0) { printAddr(P) }
print(uhex(peek(P)) + ' ') print(uhex(peek(P)) + ' ')
if (addr < 0 && addr2 < 0) { P-- } else { P++ } if (addr < 0 && addr2 < 0) { P-- } else { P++ }
} }
@@ -77,7 +86,8 @@ while (1) {
} }
else if ("N" == cmd) { else if ("N" == cmd) {
if (P >= 0) { P++ } else { P-- } if (P >= 0) { P++ } else { P-- }
println((uhex(P, 6))+' : '+uhex(peek(P))) printAddr(P)
println(uhex(peek(P)))
pE = undefined pE = undefined
} }
else if ("J" == cmd) { else if ("J" == cmd) {
@@ -90,7 +100,12 @@ while (1) {
} }
} }
else if ("P" == cmd) { else if ("P" == cmd) {
if (P >= 0) {
println(` ${P} ($${uhex(P, 6)})`) println(` ${P} ($${uhex(P, 6)})`)
}
else {
println(` ${P} (-$${uhex(-P, 6)})`)
}
pE = undefined pE = undefined
} }
else if ("W" == cmd) { else if ("W" == cmd) {

View File

@@ -86,6 +86,9 @@ MMIO
80..87 RO: RTC in microseconds 80..87 RO: RTC in microseconds
88 RW: Rom mapping 88 RW: Rom mapping
write 0xFF to NOT map any rom
write 0x00 to map BIOS
write 0x01 to map first "extra ROM"
89 RW: BMS flags 89 RW: BMS flags
0b P000 b0ca 0b P000 b0ca
@@ -103,6 +106,10 @@ MMIO
90 RO: BMS calculated battery percentage where 255 is 100% 90 RO: BMS calculated battery percentage where 255 is 100%
91 RO: BMS battery voltage multiplied by 10 (127 = "12.7 V") 91 RO: BMS battery voltage multiplied by 10 (127 = "12.7 V")
92 RW: Memory Mapping
0: 8 MB Core, 8 MB Hardware-reserved, 7 card slots
1: 12 MB Core, 4 MB Hardware-reserved, 3 card slots (HW addr 131072..1048575 cannot be reclaimed though)
1024..2047 RW: Reserved for integrated peripherals (e.g. built-in status display) 1024..2047 RW: Reserved for integrated peripherals (e.g. built-in status display)
2048..4075 RW: Used by the hypervisor 2048..4075 RW: Used by the hypervisor
@@ -260,7 +267,7 @@ SPRITE FORMAT DRAFT 2
0b 0000 00vp 0b 0000 00vp
(p: 0 for above-all, 1 for below-text, v: show/hide) (p: 0 for above-all, 1 for below-text, v: show/hide)
3 bytes 3 bytes
Pointer to raw pixmap data in Scratchpad Memory Pointer to raw pixmap data in Core Memory
MMIO MMIO
@@ -809,11 +816,11 @@ MMIO
0 RW : Bank number for the first 512 kbytes 0 RW : Bank number for the first 512 kbytes
1 RW : Bank number for the last 512 kbytes 1 RW : Bank number for the last 512 kbytes
16..23 RW : DMA Control for Lane 1..8 16..23 RW : DMA Control for Lane 1..8
Write 0x01: copy from Scratchpad to Peripheral Write 0x01: copy from Core to Peripheral
Write 0x02: copy from Peripleral to Scratchpad Write 0x02: copy from Peripheral to Core
* NOTE: after the transfer, the bank numbers will revert to the value that was befer the operation * NOTE: after the transfer, the bank numbers will revert to the value that was before the operation
24..31 RW : DMA Control reserved 24..31 RW : DMA Control reserved
32..34 RW : DMA Lane 1 -- Addr on the Scratchpad Memory 32..34 RW : DMA Lane 1 -- Addr on the Core Memory
35..37 RW : DMA Lane 1 -- Addr on the Peripheral's Memory (addr can be across-the-bank) 35..37 RW : DMA Lane 1 -- Addr on the Peripheral's Memory (addr can be across-the-bank)
38..40 RW : DMA Lane 1 -- Transfer Length 38..40 RW : DMA Lane 1 -- Transfer Length
41..42 RW : DMA Lane 1 -- First/Last Bank Number 41..42 RW : DMA Lane 1 -- First/Last Bank Number