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added missing codes

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This commit is contained in:
minjaesong
2024-09-14 01:16:31 +09:00
parent 06ea778972
commit 2f2fc85b76
2 changed files with 15 additions and 1 deletions
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10
assets/disk0/tvdos/hyve.SYS
View File

@@ -19,6 +19,7 @@ var _BIOS = {};
// Port #0-3: Serial port 1-4
// #4+ : Left for future extension
// Drive-number always starts at 1
_BIOS.HYVE = true;
_BIOS.FIRST_BOOTABLE_PORT = [0,1]; // ah screw it
Object.freeze(_BIOS);
@@ -56,8 +57,15 @@ else {
let runner = parallel.attachProgram("TVDOS", context, bios)
parallel.launch(runner)
sys.sleep(1000);
while (parallel.isRunning(runner)) {
sys.sleep(1000)
graphics.plotPixel( // test fill the framebuffer to prove VM is shared
(Math.random() * 560) | 0,
(Math.random() * 448) | 0,
(Math.random() * 256) | 0
)
sys.sleep(0)
}
println(" LX4 cya!")

6
tsvm_core/src/net/torvald/tsvm/peripheral/IOSpace.kt
View File

@@ -116,6 +116,8 @@ class IOSpace(val vm: VM) : PeriBase("io"), InputProcessor {
89L -> ((acpiShutoff.toInt(7)) or (bmsIsBatteryOperated.toInt(3)) or (bmsHasBattery.toInt(1))
or bmsIsCharging.toInt()).toByte()
in 92L..127L -> hyveArea[addr.toInt()]
in 1024..2047 -> peripheralFast[addr - 1024]
4076L -> blockTransferPorts[0].statusCode.toByte()
@@ -158,6 +160,8 @@ class IOSpace(val vm: VM) : PeriBase("io"), InputProcessor {
}
}
private val hyveArea = ByteArray(128)
override fun mmio_write(addr: Long, byte: Byte) {
val adi = addr.toInt()
val bi = byte.toInt().and(255)
@@ -186,6 +190,8 @@ class IOSpace(val vm: VM) : PeriBase("io"), InputProcessor {
acpiShutoff = byte.and(-128).isNonZero()
}
in 92L..127L -> hyveArea[addr.toInt()] = byte
in 1024..2047 -> peripheralFast[addr - 1024] = byte
4076L -> blockTransferPorts[0].statusCode.set(bi)