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how about some rng?

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This commit is contained in:
minjaesong
2020-08-10 10:05:10 +09:00
parent 1095cbe26c
commit 75fa682735
2 changed files with 47 additions and 21 deletions
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23
Videotron2K.md
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@@ -97,16 +97,17 @@ Commands can have "conditional postfix" used to execute the command conditionall
NOTE : immediates and variables can substitute registers
* add rA rB rC : rC = rA + rB
* sub rA rB rC : rC = rA - rB
* mul rA rB rC : rC = rA * rB
* div rA rB rC : rC = rA / rB
* and rA rB rC : rC = rA & rB
* or rA rB rC : rC = rA | rB
* xor rA rB rC : rC = rA ^ rB
* shl rA rB rC : rC = rA << rB
* shr rA rB rC : rC = rA >> rB
* ushr rA rB rC : rC = rA >>> rB
* add rA rB rC : rA = rB + rC
* sub rA rB rC : rA = rB - rC
* mul rA rB rC : rA = rB * rC
* div rA rB rC : rA = rB / rC
* mod rA rB rC : rA = rB % rC
* and rA rB rC : rA = rB & rC
* or rA rB rC : rA = rB | rC
* xor rA rB rC : rA = rB ^ rC
* shl rA rB rC : rA = rB << rC
* shr rA rB rC : rA = rB >> rC
* ushr rA rB rC : rA = rB >>> rC
* inc R : R = R + 1
* dec R : R = R - 1
@@ -117,7 +118,7 @@ NOTE : immediates and variables can substitute registers
NOTE : immediates and variables can substitute registers
* cmp rA rB rC : compares rA and rB and stores result to rC. 1 if rA > rB, -1 if rA < rB, 0 if rA == rB.
* cmp rA rB rC : compares rB and rC and stores result to rA. 1 if rB > rC, -1 if rB < rC, 0 if rB == rC.
### Data Control

45
src/net/torvald/tsvm/vdc/Videotron2K.kt
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@@ -76,12 +76,22 @@ class Videotron2K(var gpu: GraphicsAdapter?) {
DEFINE height 448
DEFINE width 560
mov r6 12345
SCENE rng ; r6 is RNG value
mul r6 r6 48271
mod r6 r6 2147483647
exit
END SCENE
SCENE fill_line
@ mov px 0
plot c1 ; will auto-increment px by one
inc c1
cmp c1 251 r1
movzr r1 c1 0 ; mov (-zr r1) c1 0 -- first, the comparison is made with r1 then runs 'mov c1 0' if r1 == 0
perform rng
plot r6
; plot c1 ; will auto-increment px by one
; inc c1
; cmp r1 c1 251
; movzr r1 c1 0 ; mov (-zr r1) c1 0 -- first, the comparison is made with r1 then runs 'mov c1 0' if r1 == 0
exitzr px
END SCENE
@@ -89,7 +99,7 @@ class Videotron2K(var gpu: GraphicsAdapter?) {
@ mov py 0
perform fill_line
inc py
cmp py 448 r1
cmp r1 py 448
movzr r1 py 0
next
; exeunt
@@ -371,6 +381,7 @@ object Command {
const val DEC = 0x60
const val NOT = 0x68
const val NEG = 0x70
const val MOD = 0x78
const val CMP = 0x80
const val MOV = 0x88
@@ -418,6 +429,7 @@ object Command {
"DEC" to DEC,
"NOT" to NOT,
"NEG" to NEG,
"MOD" to MOD,
"CMP" to CMP,
@@ -496,6 +508,15 @@ object Command {
checkRegisterLH(args[0])
instance.regs.setInt((args[0] and 0xF) * 4, resolveVar(instance, args[1]))
}
instSet[MUL shr 3] = { instance, args -> // MUL ACC LH RH
twoArgArithmetic(instance, args) { a,b -> a*b }
}
instSet[ADD shr 3] = { instance, args -> // ADD ACC LH RH
twoArgArithmetic(instance, args) { a,b -> a+b }
}
instSet[MOD shr 3] = { instance, args -> // MOD ACC LH RH
twoArgArithmetic(instance, args) { a,b -> a fmod b }
}
instSet[INC shr 3] = { instance, args -> // INC register
if (args.size != 1) throw ArgsCountMismatch(1, args)
checkRegisterLH(args[0])
@@ -515,11 +536,7 @@ object Command {
instance.performanceCounterTmr = System.nanoTime()
}
instSet[CMP shr 3] = { instance, args -> // CMP rA rB rC
if (args.size != 3) throw ArgsCountMismatch(3, args)
val v1 = resolveVar(instance, args[0])
val v2 = resolveVar(instance, args[1])
val cmpvar = if (v1 > v2) 1 else if (v1 < v2) -1 else 0
instance.regs.setInt((args[2] and 0xF) * 4, cmpvar)
twoArgArithmetic(instance, args) { a,b -> if (a>b) 1 else if (a<b) -1 else 0 }
}
instSet[PLOT shr 3] = { instance, args -> // PLOT vararg-bytes
if (args.isNotEmpty()) {
@@ -554,6 +571,14 @@ object Command {
}
}
private inline fun twoArgArithmetic(instance: Videotron2K, args: LongArray, operation: (Int, Int) -> Int) {
if (args.size != 3) throw ArgsCountMismatch(3, args)
checkRegisterLH(args[0])
val lh = resolveVar(instance, args[1])
val rh = resolveVar(instance, args[2])
instance.regs.setInt((args[0] and 0xF) * 4, operation(lh, rh))
}
fun checkConditionAndRun(inst: Int, instance: Videotron2K, args: LongArray) {
val opcode = inst shr 3
val condCode = inst and 7